ROSTOCK

Description

BINARY DATA PIPELINE
Model of 1989

Rostock [ˈrɔstɔk] is a component of the Leibniz Binary Subsystem. It is a data pipeline, a FIFO (first in—first out) shift register, or a very short digital delay. The module operates similarly to a BBD delay or an ASR (analog shift register), except that it is digital. It consists of a chain of memory cells that pass bits from one to another at each clock cycle. The delay length is variable from 1 to 64 stages (with optional looping and scrambling).  It works by processing data in the Leibniz bus and must be connected to other Leibniz modules using data ribbon cables at the back. Rostock may process data sequences representing rhythms, control voltages, audio-rate signals, and even video signals because the bits can change at extreme rates (up to 2MHz). In addition, its memory may be digitally looped. Delaying and looping is a fundamental building block for sequence automation, pattern and chaos generation, and various cybernetic modular patches. Thus, Rostock is a multi-purpose open-ended device that invites creative thinking.

MAIN FEATURES:

• Leibniz Binary Subsystem component
• Shift register / delay memory of up to 64 stages
• Voltage controlled length
• Looping and scrambling
• Optional individual clock input to each bit line

TECHNICAL DETAILS:

• width: 8hp
• skiff friendly
• current draw: +70mA/-40mA
• reverse power protection

VIDEO: